The invention relates to an electronic apparatus comprising a bus which interconnects a number of stations.
The 12C bus is an example of a bus for connecting a number of integrated circuit stations. The 12C bus is described in the xe2x80x9cData Handbook IC20: 80C51-based 8-bit microcontrollersxe2x80x9d issued by Philips Semiconductors in 1994, pages 1141-1159. The 12C bus comprises a bus made up of a clocksignal conductor and a data-signal conductor and allows for communication of data via the data-signal conductor, clocked by a clock signal on the clock-signal conductor.
Before or during data transmission, stations which are connected to the bus must execute an arbitration protocol to determine which station becomes bus master. During arbitration, the logic level of the signals on the data-signal and/or clock-signal is a wired logic function of signals from different stations participating in arbitration.
In case of the 12C bus, the stations control the logic levels on the clock-signal conductor in such a way that the slowest station determines the clock speed and the stations attempt to write its own information to the data-signal conductor through the wired logic in synchronism with the clock signal. This allows these participating stations to judge from the logic levels on the data signal conductor whether they have won or lost arbitration; a station loses arbitration if it does not succeed in writing its own information. The losing stations stop participating in arbitration, so that eventually only the winning station remains active.
For wired logic operation load circuits are connected to the data-signal conductor and the clock signal conductor and each station contains pull-down transistors to pull down the potential on these conductors against the load circuit as required by the arbitration protocol.
The load circuits contain for example resistors connected between the data-signal conductor and the clock-signal conductor respectively and a power supply connection. It is also known to connect a current source in parallel with such a resistor and to switch-on this current source once the resistor has sufficiently pulled up the potential on the relevant conductor.
The current supply capability of the load circuits in combination with the capacitance of the bus conductors determine the speed with which data can be communicated over the bus, in terms of the time needed by the load circuits to charge the capacitances of the bus conductors. In the 12C bus the nominal current supply capability of the load is 3 mA, bus capacitance is at most 400 pF and as a consequence the bus speed must be lower than 400 kbit per second.
It is desirable to increase the speed with which data can be communicated over the bus. In principle, this can be achieved by increasing the current supply capability of the load circuits.
However, there is a large base of existing integrated circuits capable of interfacing to the 12C bus designed to be able to drive the potential of the bus conductors to a relevant logic level against a load with the existing current supply capability of 3 mA, but not against a load with a substantially increased current supply capability. If one merely uses a load with increased current supply capability and new stations capable of driving such a load, the new stations will be unable to cooperate with integrated circuits from the existing base.
Amongst others, it is an object of the invention to provide for an electronic apparatus with a bus connecting a number of stations which allows for increased speed of data communication in a way that is compatible with arbitration requirements of slower stations, such as those designed for a slower bus.
The electronic apparatus according to the invention is set forth in claim 1. According to the invention, the current supply capability of the load circuit connected to the bus conductor is increased upon detection of victory of one station in wired logic arbitration.
Thus, the speed of communication via of the bus conductor may be increased when that one station is a station capable of driving against a load with an increased current supply capability, or when the one station indicates that it will cause the bus conductor to be driven by another station capable of driving against the load with an increased current supply capability. On the other hand, it is still possible to arbitrate with stations from the existing base of stations which do not have the capability to drive against the load with increased current supply capability. When such a station is connected to the bus conductor and it wins arbitration, the current supply capability is not increased.
Preferably, upon completion of data communication, the current supply capability of the load circuit is decreased to its original value so that the conductors are immediately available for arbitration by all stations after completion of data communication.
Preferably, the electronic apparatus increases the current supply capability or not under control of whether the station that wins arbitration is a station capable of driving against the load with increased current supply capability or not capable of said driving respectively. Thus, stations from an existing base of station which are not capable of driving against the increased load can still communicate data via the bus.
In an embodiment of the invention, each of the stations that is capable of participating in arbitration and driving against the load with increased current supply capability contains its own switchable load circuit. Such a station switches this load circuit or these load circuits to an increased current supply capability when it detects that it has won arbitration and it wants to communicate at high speed.
Thus it is unnecessary to include a load circuit independent of the stations with the ability to increase the current supply to the bus conductor. At the same time, it is avoided that more than one load circuit is switched to an increased current supply capability state so that the stations would be incapable of driving against the combination of these load circuits.
The 12C bus has two bus conductors one for a clock signal and one for a data signal. Changes in data applied to the data-signal conductor are effected only at timing distances of one period of a clock signal on the clock-signal conductor. Thus, the need for high speed on the data signal conductor is less than that on the clock-signal conductor.
Accordingly in another embodiment of the invention only the load circuit connected to the clock-signal conductor is switched to the increased current supply state; the load circuit connected to the data-signal conductor is kept in its original current supply state throughout all communication, independent of whether arbitration has been ended or not. Thus, large driving transistors for the data signal conductor are not needed.
In the 12C bus data may be transmitted by the station that has won arbitration, but also by other stations when they are instructed to do so by the station that has won arbitration. Preferably, the clock signal is always generated by the station that has won arbitration and the load circuit used to generate the increased current is particular to that station. Thus the currents involved in generating signals on the bus conductor remain local as much as possible so that as little as possible interference is generated by those currents.